Rapid Thermal Processing (RTP) was started as a research technique some 25 years ago using pulsed laser beams. As the semiconductor industry is moving towards submicron devices, RTP is becoming a core technology step in the development and mass production of ultra-large system integration (ULSI) devices. Since their introduction more than a decade ago, RTP processors employing incoherent lamps are now the mainstay. Although complete single-wafer process flows, including many RTP steps (nitridation, oxidation, dopant activation, silicide formation, and ion implantation damage removal), have been demonstrated in sub 0.5 mm CMOS devices, a surprisingly small minority is used in a full production environment. Even then, this is mainly limited to titanium (Ti) sintering and annealing, where any annealing system is successful as long as the oxygen content is kept below 5-10 ppm in a 1 atmosphere ambient.
The main obstacles for full acceptance of RTP into manufacturing are still temperature reproducibility and uniformity during all processing, i.e., in the dynamic ramp up, ramp down, and steady state of the thermal cycle, during which films are annealed or formed.
The main distinction between RTP and conventional furnace processing is that the former is a cold wall process, i.e., the lamp energy is primarily used to heat the wafer and the thermal mass of the heated system is low. Once the wafer attains the desired processing temperature, energy is required only to maintain the wafer at this processing temperature by compensating for the energy losses which take place by convection (free as well as forced convection) and radiation, as the wafer is exposed to the cold ambient. If this heat requirement is not met on any region of the wafer either during ramp up or steady state period, temperature nonuniformity is observed across the wafer.
In rapid thermal processing (RTP), the wafer is heated on the planar surfaces by lamp radiation and emits radiation from all surfaces, i.e., from top surface, bottom surface, and the edge of the wafer. The temperature nonuniformity observed across the wafer during RTP in a typical RTP chamber is due to the following reasons:
a) Nonuniform illumination across the wafer, i.e., the total optical flux (primary light from the lamps as well as the back-reflected radiation from the reflector) incident towards the edge of the wafer may be greater or less than that incident on the center of the wafer due to the wafer geometry in relation to the system geometry. This would result in the edge being either hotter or cooler, as the case may be. PA1 b) The back-reflection of the radiation emitted by the wafer may be different for different regions of the wafer, i.e., more at the center and less at the edge of the wafer. PA1 c) Patterning of the wafer with a material having thermophysical properties (emissivity, thermal conductivity, and specific heat capacity) considerably different from the substrate wafer creates local temperature nonuniformities across the surface even if the system uniformity on blank wafers is perfect. This is severe if the pattern size is larger than the diffusion length for lateral heat diffusion in silicon at the processing temperature. PA1 d) As mentioned above, the edge of the wafer loses more energy by radiation as it has a larger surface area and is exposed directly to the cold ambient chamber walls 18 and not to the lamps. This energy loss from the edge is the primary cause for the observed temperature nonuniformity across the wafer. If this is not compensated by providing additional lamp radiation at the edge, the temperature nonuniformity across the wafer will manifest itself in the form of both surface as well as bulk defects, e.g., dislocations, slip lines, and wafer warpage. PA1 initializing input data to a computer main program, said data comprising element nodes, element sectors, time intervals, and initial wafer temperatures; PA1 inputting a thermal conductivity for a wafer volume element as a function of time; PA1 inputting a plurality of coefficients used in a differential heat equation for a wafer temperature; PA1 defining system variable parameters and calculating heat losses; PA1 calculating a temperature for each wafer volume element versus time; PA1 writing an X and Y coordinate and temperature versus time for each volume element to a printer/plotter and to a heat controller; PA1 individually controlling a power level to multiple lamp banks to provide a predetermined temperature ramp rate; PA1 monitoring a wafer center temperature with a temperature sensor; PA1 providing a temperature feedback means from the temperature sensor to the computer heat controller and the computer main program, thereby quickly and accurately controlling the wafer temperature to a temperature above room temperature. PA1 a main computer and computer program having input data; PA1 a printer/plotter having an input signal from the main computer; PA1 a heat controller having an input signal from the main computer; PA1 a multiple zoned lamp bank having a power input from the heat controller; PA1 temperature indicator having temperature input from the wafer; PA1 a temperature feedback from the temperature indicator to the heat controller and main computer; PA1 a temperature feedback means to feed back temperature data to the heat controller and main computer, wherein the main computer outputs time, temperature, wafer X and Y coordinates, and heat intensity to preset and control lamp bank power input.
The convection losses and thermal conduction within the wafer are the dominant form of heat transfer mechanisms for processing temperatures less than 800.degree. C. Convective heat transfer increases across the wafer due to the presence of gas flow recirculation cells and increased gas mixing as one moves closer to the edge. Above 800.degree. C., radiation loss is the major mode of heat transfer.
Hence, the temperature nonuniformity observed across the wafer during transient ramp up may be much different from that observed during steady state as the primary heat loss mechanism in both the stages are much different. This means any technique to control the temperature nonuniformity across the wafer during the steady state should be flexible to control it during transient state, i.e., ramp up and ramp down.
In general, a typical RTP system contains three major parts (see FIG. 1A): (a) a high-power lamp system 22 heating the wafer 10; (b) a chamber 18 in which the wafer 10 is contained; and (c) a pyrometer 20 to measure the wafer temperature. The lamp system can be either a set of tungsten-halogen lamps or a high-power arc lamp with a reflector. The chamber is generally a quartz chamber. In all cases, the lamps are separated from the wafer with a quartz window 24. The pyrometer 20 measures the radiation that is emitted from the backside 14 of the wafer and converts this into wafer temperature. Other non-invasive temperature measurement techniques based on thermal expansion of the wafer, laser interferometry, and acoustic interference are being developed to accurately measure the temperature. The present model can also be applied for concentric lamp configurations and systems that use single-side heating.
Other features of this prior art chemical RTP vapor deposition (CVD) system include the quartz wafer holder 26, the process gas conduits 28, and the reflector 30. However, since the temperature nonuniformity is observed across the wafer during transient and steady state, most of the prior research has been towards improving the heating lamp system and reflector design to compensate for the additional radiation loss at the edge of the wafer. Researchers have come up with lamp system designs which can heat the edge of the wafer more than the other regions. This type of design is called lamp contouring, i.e., outer lamps being operated at significantly higher power than the inner ones. Obviously, this means using multiple lamps to heat the wafer. Researchers suggest that the sharper the increase in heat flux at the edge of the wafer the better the uniformity. This can be achieved either by suitable lamp design or reflector geometry.
The heating lamp system comes in four basic geometries: the line source, the square source, the hexagonal source, and the ring source. FIG. 1B is an example of the ring source lamp system, where the lamp bank consists of an outer ting, middle ting, and an inner lamp or ring of lamps. Most systems use line-symmetrical components, i.e., linear double-ended tubes, usually in some cross-lamp array (square symmetry source) of lamp banks below and/or above the chamber. Heating lamps are also used to form concentrically arranged optical flux rings and hexagons for uniform flood heating. A typical hexagonal lamp panel contains 109 water-cooled, cylindrical, light pipes, each with a W-halogen bulb lamp inside. One lamp is in the center and others are in six hexagonal zones around it. A fully ring-shaped symmetry is offered by a resistance-heated, silicon carbide bell-jar, which serves as the heat source as well as the reaction chamber. It is obvious that the pseudo-ring or the hexagonal symmetry is the most complicated yet the most promising, as compared to line and square sources, which are not compatible with the circular wafer shape.
Reflector designs, in general, have the same general geometries as the lamps and/or the chamber. Often the reflector is conformal to, or is, the chamber walls. In that case, most designs make use of a gradient in the reflectivity of the reflector. One way is to make reflector more reflective at the edge. The disadvantage of this design is that it addresses temperature nonuniformity issue only during one phase of the processing cycle, i.e., steady state. It doesn't correct for edge effects during ramp up as the edge effects are considerably different from that during steady state. The temperature nonuniformity at the very end of the ramp up thermal cycle is the one which manifests itself in the form of wafer warpage and slip. Adaptive multizone heat control is a better solution.
Another alternative to compensate for the edge effect during steady state is to provide a polysilicon guard ring assembly 32 (slip-free ring) around the wafer as in FIG. 2 which is heated along with the wafer 10. This avoids the edge of the wafer being exposed to cold ambient during the processing. So, in effect, the wafer 10 is extended up to the ring 34 and the actual slip might take place in the ring. The wafer 10 is placed on the guard pins 36 which are supported by the ring tray 38. The actual temperature reached by the guard ring could be less or more compared to the wafer depending on the surface structure (roughness, emissivity), doping concentration of the ring, and the ring/heating lamp geometry. However, the temperature nonuniformity problem is not addressed fully, as the wafer edge would now cool more slowly compared to the center during ramp down, resulting in temperature nonuniformities.
Once the emissivity, wafer pattern, thermophysical, and thermochemical properties are entered into the main program, it will give the intensity of various zones that will be required for achieving maximum uniformity across the wafer.
In a typical prior art process, without the computer simulation before experimental trial, it would be necessary to prepare a heat lamp ramp up and steady state energy program using various lamp bank combinations and then perform experiments on multiple wafers until a successful wafer anneal was achieved. Successful being one that did not have nonuniformities that create wafer dislocations, slip lines, or warpage. The unsuccessful experiments created wasted wafers, and expensive time was lost.